SiC MOSFETs switch faster, run hotter and sit on smaller dies than silicon IGBTs. The substrate underneath them has two jobs that pull in opposite directions: move heat out of a small footprint, and survive thousands of thermal cycles without the copper peeling off. This note compares the three common options.
For a first estimate, treat the ceramic as a one-dimensional slab under the die and ignore heat spreading:
where is the ceramic thickness, its thermal conductivity and the die area. For a mm die ():
| Substrate | (mm) | (W/m·K) | (K/W) | at 100 W |
|---|---|---|---|---|
| Al₂O₃ DBC | 0.38 | 24 | 0.158 | 15.8 K |
| AlN DBC / AMB | 0.635 | 170 | 0.037 | 3.7 K |
| Si₃N₄ AMB | 0.32 | 90 | 0.036 | 3.6 K |
Si₃N₄ has about half the conductivity of AlN, but because it is strong enough to be made thin, its ceramic-layer resistance ends up roughly the same. Alumina is four times worse.
Heat spreading in the copper lowers all three numbers, so treat these as relative rather than absolute values.
During every power cycle, copper ( ppm/K) tries to expand far more than the ceramic beneath it (– ppm/K). The resulting stress concentrates at the copper edge and eventually cracks the ceramic or delaminates the bond.
What resists this is fracture toughness:
This is why Si₃N₄ AMB can carry 0.8 mm copper, which in turn adds lateral heat spreading and current capacity, while AlN with thick copper is prone to cracking.
We keep all three ceramics in stock and ship custom-patterned samples in 5–6 days. Send us your drawing and we will review it for creepage, clearance and copper balance before quoting.