Design rules for DBC and AMB substrates. Follow these and your drawing goes straight to production.
| Ceramic | Flexural (MPa) | λ @20 °C (W/m·K) | CTE 20–400 °C (ppm/K) | εr @1 MHz | Breakdown (kV/mm) | E (GPa) | Density (g/cm³) |
|---|---|---|---|---|---|---|---|
| Si₃N₄ (high-k) | > 700 | ≥ 80 | 2.6–2.9 | 9.0 | > 25 | 310 | 3.22 |
| Si₃N₄ (standard) | ≥ 625 | ≥ 65 | 2.6–2.9 | 8.0 | > 25 | 310 | 3.17 |
| AlN | > 350 | > 170 | 4.6 | 8.7 | > 15 | 320 | 3.30 |
| Al₂O₃ 96% | ≥ 400 | 24 | 6.8–7.1 | 9.8 | > 15 | 340 | 3.75 |
Oxygen-free high-conductivity copper (OFHC), purity 99.99 %, conductivity 58 MS/m at 20 °C.
| Thickness | Si₃N₄ | AlN | Al₂O₃ |
|---|---|---|---|
| 0.25 | ● | – | – |
| 0.32 | ● | – | ● |
| 0.38 | – | ● | ● |
| 0.63 | – | ● | ● |
| 1.00 | – | ● | – |
Top and bottom copper can differ. Other ceramic and copper thicknesses on request.
Etched copper has sloped side walls, so the gap is narrowest at the top surface and the trace is widest at the foot. All values below refer to the copper pattern at the ceramic side (the foot of the copper).
| Cu d (mm) | Min. gap (mm) | Min. width (mm) |
|---|---|---|
| 0.127 | 0.20 | 0.20 |
| 0.20 | 0.30 | 0.35 |
| 0.25 | 0.35 | 0.40 |
| 0.30 | 0.40 | 0.50 |
| 0.40 | 0.50 | 0.60 |
| 0.50 | 0.60 | 0.70 |
| 0.80 | 0.70 | 1.00 |
| Cu d (mm) | Min. edge margin (mm) |
|---|---|
| 0.10 – 0.25 | 0.20 |
| 0.30 – 0.50 | 0.30 |
| 0.80 | 0.50 |
| Cu d (mm) | F = d / A |
|---|---|
| 0.10 – 0.30 | ≥ 3.0 |
| 0.40 – 0.50 | ≥ 2.5 |
| 0.80 | > 2.0 |
For high-voltage designs, the gap is usually set by creepage and partial-discharge requirements rather than by etching capability. Tell us your blocking voltage and we will check it.
| Cu d (mm) | Tolerance (mm) |
|---|---|
| 0.10 – 0.15 | ± 0.10 |
| 0.20 – 0.30 | ± 0.15 |
| 0.40 – 0.50 | ± 0.20 |
| 0.50 – 0.80 | ± 0.25 |
| Cu d (mm) | Offset (mm) |
|---|---|
| ≤ 0.30 | < 0.15 |
| 0.40 – 0.80 | < 0.20 |
| Ceramic d (mm) | Tolerance (mm) |
|---|---|
| ≤ 0.38 | ± 0.05 |
| 0.38 – 0.635 | ± 0.15 |
| ≥ 0.635 | ± 0.20 |
Rmax ≤ 50 µm · Ra ≤ 1.5 µm · Rz ≤ 10 µm (smoother on request)
| Finish | Thickness | Best for |
|---|---|---|
| Bare copper | — | Lowest cost; solder or sinter soon after delivery |
| Anti-oxidation (OSP) | — | Protects bare Cu during storage |
| Electroless Ni (ENi) | 3–7 µm, 6–10 % P | Robust solder and wire-bond surface |
| ENIG (Ni/Au) | Ni 3–7 µm, Au 0.01–0.1 µm | Long shelf life, fine-pitch soldering |
| Electroless Ag | 0.1–1 µm | Preferred for Ag sintering |
| Item | Rule |
|---|---|
| Minimum mask width | ≥ 0.20 mm |
| Mask position tolerance | ± 0.20 mm |
| Minimum mask spacing | ≥ 0.20 mm |
| Mask edge to copper edge | ≥ 0.10 mm |
| Heat resistance | ≤ 288 °C / 30 s; ≤ 320 °C / 10 s |
All values are typical capability. Tighter tolerances and other thicknesses can be agreed per project.